LaMAGIC2: Advanced Circuit Formulations for Language Model-Based Analog Topology Generation

Addressing limitations

Thanks for your advice on discussing the weakness of our methods. This is a helpful idea to contribute more to the community.

The circuit space will grow exponentially with number of nodes increases. In addition, the simulation time for larger circuits will also increase, causing the scarcity of training data and limiting the model generalizability. Thus, this one-shot generation approach may become less effective for significantly larger circuit designs.

To address these challenges, for future works, we are developing search-based decoding methods with our models to generate optimized circuits for larger and more diverse design spaces. For example, Monte-Carlo tree search (MCTS) is a promising method to expand the language model capability in test-time computation. This integration can balance the strengths of generative and search-based approaches, enhancing the quality and practicality of automated analog circuit design solutions.

Response to Question on Architecture Impact

In our experiments, all circuit representations (both SFCI and matrix-based) fit within a single 1024-token context window, and no context-window shifting is necessary during generation. Under this setting, we observed that our SFCI consistently outperformed matrix-based formulations. The reduced token length and the use of component-type token of SFCI can improve the model performance and has faster convergence (23.0% fewer training steps compared to SFM, as mentioned in our response to Reviewer 2sgz).

Given that our experimental setup does not require multiple context windows, increasing the window size (e.g., from 1024 to 2048 tokens) would not directly influence the relative benefits of SFCI. However, we expect that as circuit size scales up (e.g., larger circuits exceeding one context window), SFCI would provide greater advantages. Specifically, when matrix-based formulations need context-window shifting, this will lead to degraded performance, since the model cannot see the entire circuit during generation. In contrast, SFCI would be more suitable for generating larger circuits without context-window shifting due to its compact token length.

Question for computational efficiency

Based on the question, we further record the training steps that required for matrix formulation (SFM) and the succinct canonical formulation with identifier (SFCI). Specifically, SFM saturates at 8943 steps, and SFCI converges at 6886 steps. This shows that our SFCI reduces 23.0% of training steps compared to SFM, thus enhancing the computational efficiency.

We will include this experimental results if we get accepted!

Clarification on previous work and our methodology

We thank the reviewer for this important comment. Our paper focuses on developing supervised fine-tuning (SFT) methods for language models in analog topology generation task. Our SFCI formulation contributes these key innovations:

1. It proposes a compact canonical form with component-type tokens to enhance the learning of different circuit devices.
2. It increases the attention on the float-valued inputs of circuit specifications, thus effectively capturing the relations between numerical circuit specifications and circuit topologies.

LaMAGIC was selected as the primary baseline because, to the best of our knowledge at submission time, it is the only prior work using SFT with transformer-based LMs for analog topology generation. Additionally, we compare with a RL search method for power converter to comprehensively demonstrate the benefits of our generative approach over conventional search techniques. These two methods (LaMAGIC and RL) cover well the previous works for power converter topology generation, and we have thoroughly discussed other related methods in Section 2.3 of our paper.

Question for complexity

We appreciate the reviewer’s question and apologize for any confusion caused by our initial complexity characterization. In our original submission, we described the token length complexity as $O(|V| + |E|)$, assuming a simple graph scenario where the SFCI representation is a vertex-to-edge adjacency list for a graph with $|V|$ vertices and $|E|$ edges. Upon careful re-examination, we realized this characterization was inaccurate, as our formulation is actually a hypergraph represented by an edge-to-vertex adjacency list.

Correct Hypergraph Complexity Analysis

Each hyperedge $e_i$ has $k_i$ vertices. Therefore, the total token length, representing the sum of vertex incidences across all hyperedges, is:

For our power converter devices, each vertex appears in at most two hyperedges: $d(v)≤2$.

Thus, the total number of vertex incidences , which equals to the number of edges of all nodes, is:

This upper bound implies the total token length is at most $2|V|$, which simplifies to $O(|V|)$. This result indicates that the token length complexity of SFCI is independent of the number of edges $|E|$. The $O(|V)$ token length of SFCI demonstrates its compactness compared to $O(|V|^2)$ lengths of matrix formulations.

We will revise the token length complexity to $O(|V|)$ and include the above proof in our manuscript accordingly, to improve clarity and readability for the readers.

Q1: Choice of Model Architecture

We appreciate the suggestion to evaluate our proposed formulations using other model architectures. In this work, we adopted T5 to maintain architectural consistency with previous work LaMAGIC, enabling a fair comparison focused on the impact of new formulations.

We have considered extending to encoder-only models (e.g., GPT-2), which are often more suitable for scaling up the parameter count compared to encoder-decoder models. However, due to the limited rebuttal timeline, we were unable to complete the experiments.

Our proposed float-input setting and SFCI formulation are architecture-agnostic and can be applied by any transformer models with sequential inputs. Specifically, the float-input directly feeds numerical specifications into the model without discretization by transitional tokenizers to improve numerical representation. Also, the SFCI formulation further provides a compact representation of circuit topologies, which improves the learning for larger circuits.

Another reason we chose T5 is its smaller model size comparing to more general models, which makes it more suitable for application-specific use cases like this work while also being more energy-efficient and low-cost.

Q2: Comparison with commercial LLMs

Based on your suggestion, we evaluate o1 using a few-shot setup. We provide 100 example circuits as context and evaluate performance on the same 350 specifications used in our main experiments (Figure 5 in the paper). Below are the results:

Success rates at thresholds from 0.01 to 0.1:

MSE of voltage conversion ratio:

This result shows that our model significantly outperforms o1, indicating our supervised fine-tuning is needed to tackle the analog circuit design, which demand high precision and the interaction of custom SPICE simulators.