Mingxuan Yuan

PASER: Post-Training Data Selection for Efficient Pruned Large Language Model Recovery

Evolving Graph Structured Programs for Circuit Generation with Large Language Models

A Hierarchical Circuit Symbolic Discovery Framework for Efficient Logic Optimization

Reasoning Scaffolding: Distilling the Flow of Thought from LLMs

TrimR: Verifier-based Training-Free Thinking Trimming for Efficient Test-Time Scaling

MOSS: Efficient and Accurate FP8 LLM Training with Microscaling and Automatic Scaling

Scaling Up, Speeding Up: A Benchmark of Speculative Decoding for Efficient LLM Test-Time Scaling

Beyond Speedup - Utilizing KV Cache for Sampling and Reasoning

Expertise Can Be Helpful for Reinforcement Learning-based Macro Placement

Beyond Tokens: Enhancing RTL Quality Estimation via Structural Graph Learning

Learning A Linear Delay Surrogate Model for Timing-Driven Chip Global Placement

LoopServe: An Adaptive Dual-phase LLM Inference Acceleration System for Multi-Turn Dialogues

Multimodal LLM-assisted Evolutionary Search for Programmatic Control Policies

SeedThink: Test-Time Control via Seed-Thought Initialization

UniRTL: Unifying Code and Graph for Robust RTL Representation Learning

ARS: Automatic Routing Solver with Large Language Models

ShortCircuit: AlphaZero-Driven Generative Circuit Design

Why Attention Patterns Exist: A Unifying Temporal Perspective Analysis

SAC-Opt: Semantic Anchors for Iterative Correction in Optimization Modeling

FuseGPT: Prune-and-Fuse Knowledge Redistribution for Efficient Transformers

Analytical Restructuring of Feed-Forward Networks for Accelerated LLM Inference

REG: A Regularization Optimizer for Robust Training Dynamics

Harnessing Large Language Models Locally: Empirical Results and Implications

High-Performance Arithmetic Circuit Optimization via Differentiable Architecture Search

LaMPlace: Learning to Optimize Cross-Stage Metrics in Macro Placement

Dependency Matters: Enhancing LLM Reasoning with Explicit Knowledge Grounding

Accurate KV Cache Eviction via Anchor Direction Projection for Efficient LLM Inference

Circuit Transformer: A Transformer That Preserves Logical Equivalence

A Graph Enhanced Symbolic Discovery Framework For Efficient Logic Optimization

Computing Circuits Optimization via Model-Based Circuit Genetic Evolution

CORE: Collaborative Optimization with Reinforcement Learning and Evolutionary Algorithm for Floorplanning

AttentionPredictor: Temporal Patterns Matter for KV Cache Compression

Boosting Neural Combinatorial Optimization for Large-Scale Vehicle Routing Problems

Accelerating Large Language Model Reasoning via Speculative Search

HyperTree Planning: Enhancing LLM Reasoning via Hierarchical Thinking

ICAM: Rethinking Instance-Conditioned Adaptation in Neural Vehicle Routing Solver

Certifying Language Model Robustness with Fuzzed Randomized Smoothing: An Efficient Defense Against Backdoor Attacks

Preserving LLM Capabilities through Calibration Data Curation: From Analysis to Optimization

SpaceGNN: Multi-Space Graph Neural Network for Node Anomaly Detection with Extremely Limited Labels

PASER: Post-Training Data Selection for Efficient Pruned Large Language Model Recovery

PASER: Post-Training Data Selection for Efficient Pruned Large Language Model Recovery

The Graph's Apprentice: Teaching an LLM Low-Level Knowledge for Circuit Quality Estimation

KVTuner: Sensitivity-Aware Layer-Wise Mixed-Precision KV Cache Quantization for Efficient and Nearly Lossless LLM Inference

ShortCircuit: AlphaZero-Driven Generative Circuit Design

SeaDAG: Semi-autoregressive Diffusion for Conditional Directed Acyclic Graph Generation

Can Symbolic Regression of Boolean Functions Boost Logic Synthesis?

Towards LLM4Floorplan: Agents Can Do What Engineers Do in Chip Design

Benchmarking End-To-End Performance of AI-Based Chip Placement Algorithms

Searching Strengthens Large Language Models in Finding Bugs of Deep Learning Libraries

BBOPlace-Bench: Benchmarking Black-Box Optimization for Chip Placement