Wenfei Zhou

Can LLMs Design Real Hardware? A New Benchmark for RTL Design and Verification Tasks

Judge's Verdict: A Comprehensive Analysis of LLM Judge Capability Through Human Agreement

CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repair

ChipVQA: Benchmarking Visual Language Models for Chip Design