Yun-Da Tsai

Why is the LLM unsure? Profiling the Causes of LLM Uncertainty for Adaptive Model and Uncertainty Metric Selection

Can LLMs Design Real Hardware? A New Benchmark for RTL Design and Verification Tasks

CraftRTL: High-quality Synthetic Data Generation for Verilog Code Models with Correct-by-Construction Non-Textual Representations and Targeted Code Repair