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全站排名 #45,379

发表论文4 篇

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年均产出2.0 篇/年

Shuyao Cheng

Assistant Professor@Institution of Computing Technology, Chinese Academy of Sciences·中国·OpenReview

LocalV: Exploiting Information Locality for IP-level Verilog Generation

ICLR 2026Rejected

Circuit HMM: A Deterministic Hidden Markov Model for Automated Sequential Circuit Design

ICLR 2026Rejected

QiMeng-CodeV-R1: Reasoning-Enhanced Verilog Generation

NeurIPS 2025Poster

QiMeng-SALV: Signal-Aware Learning for Verilog Code Generation

NeurIPS 2025Poster

合作者 (20)